http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2018006025-A1

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filingDate 2016-06-30-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e3e3e0e2a450375b8c45205fd01f1431
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publicationDate 2018-01-04-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-2018006025-A1
titleOfInvention Long channel and short channel vertical fet co-integration for vertical fet vtfet
abstract A semiconductor and a method of forming a semiconductor on a single chip, including forming a shallow trench isolation (STI) region on a short channel device and a long channel device, forming at least two vertical fins connected in the long channel device, and forming contacts on a source and drain regions for the long channel device and short channel device, wherein the contacts connect a top surface of the source or drain region for series FET (Field-Effect Transistor) connection for the long channel device.
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