| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_8ff538ed094988386084565bc7f62aeb |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-02126
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-3114 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76834
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76832
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76831
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31111
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-53295
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5283
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-528
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-3171
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0248
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-3135
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76892 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-31
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-528
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-532
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-311 |
| filingDate |
2016-12-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3a608114a24783901c3e61e116bb0aca
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_af128c70ab90218df6712d7daa3a03c8 |
| publicationDate |
2017-10-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-2017301623-A1 |
| titleOfInvention |
Stack of layers for protecting against a premature breakdown of interline porous dielectrics within an integrated circuit |
| abstract |
A stack including a dual-passivation is etched locally so as to reveal contact pads of an integrated circuit which are situated above a last metallization level of an interconnection part of the integrated circuit. This stack serves to protect the integrated circuit against a breakdown of at least one dielectric region, at least in part porous, separating two electrically conducting elements of the interconnection part of the integrated circuit. Such a breakdown may occur due to electrical conduction assisted by the presence of defects within the at least one dielectric region. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-113725167-A |
| priorityDate |
2016-04-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |