Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_36333273e27f0db23ddddbf80ba79ba7 |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-0002 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-288 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-28556 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-2885 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-53209 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-53266 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76882 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76831 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-7684 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-485 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-532 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-288 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-285 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-485 |
filingDate |
2017-03-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_701816bed27037a30a99ee9bd9416a20 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_bc92f76ae717916c7ab22d2e5d0f5bc7 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_febc0441d910ce42778d0115f8c5245b http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_4bd6ff0408ae7d3107a71ddf75070d40 |
publicationDate |
2017-07-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
US-2017200612-A1 |
titleOfInvention |
Method for forming semiconductor device structure |
abstract |
A method for forming a semiconductor device structure is provided. The method includes forming a dielectric layer over a semiconductor substrate. The dielectric layer has a first recess. The method includes forming a first conductive material layer over an inner wall and a bottom of the first recess. The first conductive material layer is partially filled in the first recess. The method includes performing a reflow process to convert the first conductive material layer into a first conductive layer. The first conductive layer has a second recess in the first recess. The method includes performing an electroplating process or an electroless plating process to form a second conductive layer over the first conductive layer so as to fill the second recess. |
priorityDate |
2014-10-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |