| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_36333273e27f0db23ddddbf80ba79ba7 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66545
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823437
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823431
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7848
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-6656
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823456
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0886
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42376
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4238
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-28114 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-423
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8234
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-66 |
| filingDate |
2016-01-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_9bdf6ac48d33250539bcf2a945abdb31
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_af9b0ed5c62cb9c10030aa1e961f620f
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_68298e8e373a8c0ab442b9ee65fd5848 |
| publicationDate |
2017-06-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-2017179117-A1 |
| titleOfInvention |
Semiconductor device and manufacturing method thereof |
| abstract |
A semiconductor device includes a substrate, a core device, and an input/output (I/O) device. The core device is disposed on the substrate. The core device includes a first gate electrode having a bottom surface and at least one sidewall. The bottom surface of the first gate electrode and the sidewall of the first gate electrode intersect to form a first interior angle. The I/O device is disposed on the substrate. The I/O device includes a second gate electrode having a bottom surface and at least one sidewall. The bottom surface of the second gate electrode and the sidewall of the second gate electrode intersect to form a second interior angle greater than the first interior angle of the first gate electrode. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10811320-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11264484-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10770352-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2019103325-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2018175030-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-3333888-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10872890-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11251089-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10134763-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10297614-B2 |
| priorityDate |
2015-12-17-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |