| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c63bc5ef3ae590b0603de4587961cac3 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-17181
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-16227
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-16146
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-1434
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-14
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2225-06565
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2225-06541
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2225-06517
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2225-06513
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-13025
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L25-18
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K3-356113 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-481
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L25-0657
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K3-356113
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-318513
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5226 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K3-356
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-48 |
| filingDate |
2015-06-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0fd8e766333cb6af2e9f496b53d489f6 |
| publicationDate |
2016-09-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-2016254213-A1 |
| titleOfInvention |
Stack package and semiconductor integrated circuit device including a variable voltage |
| abstract |
A stack package may include a first chip, a second chip, a through silicon via (TSV) and an interface circuit unit. The first chip may include a first internal circuit unit driven by an internal voltage. The second chip may be stacked over the first chip. The second chip may include a second internal circuit unit driven by the internal voltage. The TSV may be electrically coupled between the first chip and the second chip. The interface circuit unit may be arranged in the first chip and the second chip. The interface circuit unit may be coupled to the TSV. A portion of the interface circuit unit may be received a variable voltage different from the internal voltage as a driving voltage. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9536807-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11217144-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11422181-B2 |
| priorityDate |
2015-02-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |