http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2015262830-A1

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filingDate 2014-03-13-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_915225c0889e64a81f1a613cc4171585
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publicationDate 2015-09-17-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-2015262830-A1
titleOfInvention Mechanisms for forming patterns using multiple lithography processes
abstract The present disclosure provides a method for forming patterns in a semiconductor device. In accordance with some embodiments, the method includes providing a substrate, a patterning-target layer over the substrate, and a hard mask layer over the patterning-target layer; forming a first pattern in the hard mask layer; removing a trim portion from the first pattern in the hard mask layer to form a trimmed first pattern; forming a first resist layer over the hard mask layer; forming a main pattern in the first resist layer; and etching the patterning-target layer using the main pattern and the trimmed first pattern as etching mask elements to form a final pattern in the patterning-target layer. In some embodiments, the final pattern includes the main pattern subtracting a first overlapping portion between the main pattern and the trimmed first pattern.
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