| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6af9a57049d2d91c036d4f5ab49154cb |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823807
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823412
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02532
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0245
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7848
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02694
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66636
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02579
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823814
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02639
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0262
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-092
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823425 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-02
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-66
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-088 |
| filingDate |
2013-09-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6a56d270ef4db7aa384ae74406e03218
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1e8f844a5415ac9a94c7f92c8f6df6d7
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8fa2439185f0880744d9d9af113eaaa9
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_79da1f0f0129115281ee861219ef9d5b |
| publicationDate |
2015-03-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-2015076560-A1 |
| titleOfInvention |
Integrated circuits including epitaxially grown strain-inducing fills doped with boron for improved robustness from delimination and methods for fabricating the same |
| abstract |
Integrated circuits and methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes forming a cavity in a semiconductor region laterally adjacent to a gate electrode structure. An EPI strain-inducing fill is deposited into the cavity. The EPI strain-inducing fill includes a main SiGe layer and a Si cap that overlies the main SiGe layer. The EPI strain-inducing fill is doped with boron and has a first peak boron content in an upper portion of the EPI strain-inducing fill of about 2.5 times or greater than an average boron content in an intermediate portion of the main SiGe layer. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2017141228-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-105374665-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11411108-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2017194495-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11488960-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9831343-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2016163788-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10886406-B1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9954052-B2 |
| priorityDate |
2013-09-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |