http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2014206152-A1
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_8d629238b5c0aada2fc57fa5dbb59a41 |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-49816 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-4832 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-09701 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-15311 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-48091 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-486 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-498 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-49861 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-50 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-48 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-50 |
| filingDate | 2014-03-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_7a58ad7aa945c014ba8a26133ee03f3a http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_fbcfc226d1c37132761bcb9f0db01950 |
| publicationDate | 2014-07-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | US-2014206152-A1 |
| titleOfInvention | Single layer bga substrate process |
| abstract | The present disclosure provides semiconductor packaging techniques that form a substrate using metal and insulating materials. The substrate includes a first surface that is bonded to a semiconductor device and a second surface that is bonded to a printed circuit board. The substrate is formed using several techniques that minimize the amount of mask levels used to form the substrate. For example, a metal substrate is patterned to form a three dimensional pattern on the surface. A dielectric material is deposited on the three dimensional pattern. Using several patterning and polishing embodiments described herein, the metal/dielectric substrate is patterned and polished to form a substantially flush surface that is bonded to the semiconductor device. In one embodiment, the top surface of the metal/dielectric substrate is patterned to expose the underlying metal substrate and the bottom surface of the metal substrate is polished to be substantially flush with the dielectric material. |
| priorityDate | 2011-01-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 27.