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filingDate 2014-02-24-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c735e432d3fa63ec8c767a7685e9be7c
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publicationDate 2014-06-19-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-2014167157-A1
titleOfInvention Source/drain extension control for advanced transistors
abstract A planar transistor with improved performance has a source and a drain on a semiconductor substrate that includes a substantially undoped channel extending between the source and the drain. A gate is positioned over the substantially undoped channel on the substrate. Implanted source/drain extensions contact the source and the drain, with the implanted source/drain extensions having a dopant concentration of less than about 1×10 19 atoms/cm 3 , or alternatively, less than one-quarter the dopant concentration of the source and the drain.
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