| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_e757fd4fedc4fe825bb81b1b466a0947
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6af9a57049d2d91c036d4f5ab49154cb |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-0002
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66575
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66545 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-456
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-28518
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-768
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-485 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768 |
| filingDate |
2013-06-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a3f3dc6cb63816e79cd19f0b4f316472
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6cd7756f0c47b6f97d7a785f19646b49
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ebc579a4d860b2433a902dced396cae1
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_4adf544032f1a99f38ebb7cfe5d735b4 |
| publicationDate |
2013-10-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-2013267090-A1 |
| titleOfInvention |
Method to control metal semiconductor micro-structure |
| abstract |
A method of forming a metal semiconductor alloy that includes forming an intermixed metal semiconductor region to a first depth of a semiconductor substrate without thermal diffusion. The intermixed metal semiconductor region is annealed to form a textured metal semiconductor alloy. A second metal layer is formed on the textured metal semiconductor alloy. The second metal layer on the textured metal semiconductor alloy is then annealed to form a metal semiconductor alloy contact, in which metal elements from the second metal layer are diffused through the textured metal semiconductor alloy to provide a templated metal semiconductor alloy. The templated metal semiconductor alloy includes a grain size that is greater than 2× for the metal semiconductor alloy, which has a thickness ranging from 15 nm to 50 nm. |
| priorityDate |
2011-01-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |