Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6af9a57049d2d91c036d4f5ab49154cb |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L22-34 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76898 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-544 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768 |
filingDate |
2010-04-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f3c2730d317a5342009d6357cff640d8 |
publicationDate |
2011-10-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
US-2011248263-A1 |
titleOfInvention |
Integrated circuits having backside test structures and methods for the fabrication thereof |
abstract |
Embodiments of a method for fabricating an integrated circuit having a backside test structure are provided. In one embodiment, the method includes the steps of providing a semiconductor substrate, forming at least one Through-Silicon-Via (TSV) through the semiconductor substrate, forming a backside probe pad over the backside of the semiconductor substrate and electrically coupled to the at least one TSV, and forming a frontside bondpad over the frontside of the semiconductor substrate. The frontside bondpad is electrically coupled to the backside probe pad by the at least one TSV. |
isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8809189-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9257352-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2013183836-A1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8872348-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2012175612-A1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10043723-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8853693-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2014266292-A1 |
priorityDate |
2010-04-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |