| abstract |
Passivation films 3 a, 3 b are formed to cover both surfaces of semiconductor substrate 1 which comprises terminal pads 2 a, 2 b on both surfaces. Openings 3 c, 3 d are provided at positions on passivation films 3 a, 3 b which match with terminal pads 2 a, 2 b . Throughholes 9 are formed inside of openings 3 c, 3 d to extend through terminal pad 2 a , semiconductor substrate 1 , and terminal pad 2 b . Insulating layer 4 made of SiO 2 , SiN, SiO, or the like is formed on the inner surfaces of throughholes 9 . Buffer layer 5 made of a conductive adhesive is formed to cover insulating layer 4 and terminal pads 2 a, 2 b in openings 3 c, 3 d . Further, conductive layer 6 made of a metal film is formed on buffer layer 5 by electrolytic plating, non-electrolytic plating, or the like. |