| abstract |
An iridium encased copper interconnect comprises an iridium liner formed within a trench in a dielectric layer, wherein the iridium liner is formed directly on the dielectric layer, a copper interconnect formed on the iridium liner, and an iridium capping layer formed on the copper interconnect. The iridium encased copper interconnect may be fabricated by providing a semiconductor substrate in a reactor, wherein the semiconductor substrate includes a trench etched into a dielectric layer, pulsing trimethylaluminum into the reactor proximate to the semiconductor substrate, pulsing an iridium precursor into the reactor proximate to the semiconductor substrate, wherein the trimethylaluminum enables an iridium species to deposit directly on the dielectric layer, depositing a copper seed layer on the iridium species layer using an electroless deposition process, and depositing a bulk copper layer on the copper seed layer using an electroplating process. |