| abstract |
In one aspect of the invention, a method for forming interconnects on a substrate is provided. A metal passivation layer is selectively formed on conductive elements of the substrate. Thereafter, one or more dielectric layers are deposited over the metal passivation layer. Interconnect lines and vias are then patterned and etched into the one or more dielectric layers. A conductive layer is subsequently deposited over the interconnect lines and vias. In another aspect of the invention, the selective deposition process may comprise electroless deposition of the metal passivation layer. Alternatively, the selective deposition process may comprise a selective chemical vapor deposition process. The metal passivation layer may also be formed by depositing a metal alloy of copper over the conductive element, depositing a copper layer over the metal alloy, and annealing the metal alloy. In another aspect still, a metal passivation layer is selectively deposited over the conductive element of the substrate. A first dielectric layer is then deposited over the metal passivation layer and the substrate. This is followed by depositing a second dielectric layer over the first dielectric layer. Preferably, the first dielectric layer has a dielectric constant higher than a second dielectric constant of the second dielectric layer. It is also preferred that the first and second dielectric layers have dissimilar etch characteristics. Interconnect lines and vias are then etched in the first and second dielectric layers using selective etch chemistry. The interconnect lines and vias are then filled with at least one conductive material. |