| abstract |
A method for forming a damascene interconnection. After forming an insulating layer on a semiconductor substrate, the insulating layer is patterned and etched to form an opening. A barrier layer is formed on an entire surface of a resulting structure where the opening is formed. A seed layer is formed on at least on a sidewall of the opening on which the barrier layer is formed, and on a top surface of the insulating layer, using an ionized physical vapor deposition (PVD) apparatus having a target to which a power for making plasma is applied, and a chuck to which a radio frequency (RF) bias for accelerating ions is applied. When the seed layer is formed using an ionized PVD process, the power and bias are controlled to resputter an initial seed layer formed on a bottom of the opening. The resputtered seed layer is redeposited on the sidewall of the opening, forming a seed layer with a good step coverage characteristic on the sidewall. The barrier layer on the bottom of the opening is selectively removed to reduce a contact resistance. |