| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_01e48e78fadaaec045333f9ad5a6e0b5 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/C08G77-14 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02282
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/C08G77-54
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/C08G77-14
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0274
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0332
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/C08G77-20
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02216
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0337
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/C09D183-06
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G03F7-0752
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02126
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G03F7-094
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G03F7-11
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G03F7-0757
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G03F7-09 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-033
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-027 |
| filingDate |
2020-08-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2022-06-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_4e6f79508a77990043d2c41924a44f5d
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b1f5642b1d3469a67015c1b9fe8465bf
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_28bb0cf382cafaf91554c3159b73d74b
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c2a78560ed632fa4866e5289fcb5a7a3 |
| publicationDate |
2022-06-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-11361967-B2 |
| titleOfInvention |
Underlayers for EUV lithography |
| abstract |
New lithographic compositions for use as EUV silicon hardmask layers are provided. The present invention provides methods of fabricating microelectronic structures and the resulting structures formed thereby using EUV lithographic processes. The method involves utilizing a silicon hardmask layer immediately below the photoresist layer. The silicon hardmask layer can either be directly applied to the substrate, or it can be applied to any intermediate layer(s) that may be applied to the substrate. The preferred silicon hardmask layers are formed from spin-coatable, polymeric compositions. The inventive method improves adhesion and reduces or eliminates pattern collapse issues. |
| priorityDate |
2019-08-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |