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filingDate 2020-12-15-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2022-03-29-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f5cb9c8c990ce0b201b6074ca4580e94
publicationDate 2022-03-29-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-11289382-B2
titleOfInvention Method for forming transistor with strained channel
abstract A method of forming a semiconductor structure. A first sacrificial gate is formed on a substrate. A spacer is formed on a sidewall of the first sacrificial gate. In the substrate, adjacent to the first sacrificial gate, a source region and a drain region are formed. A channel region is formed between the source region and the drain region. The first sacrificial gate is removed, and a gate trench is formed on the channel region between the spacers. The substrate is etched via the gate trench, thereby forming a recessed trench between the source region and the drain region, and extending into the substrate. The recessed trench has a hexagonal cross-sectional profile. A stress inducing material layer is then formed in the recessed trench. A channel layer is epitaxially grown on the stress inducing material layer. A gate structure is formed on the channel layer.
priorityDate 2019-01-14-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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