| abstract |
Chip packages and method of manufacturing the same are disclosed. In an embodiment, a chip package may include: a redistribution layer (RDL); a first chip including a plurality of first contact pads, the plurality of first contact pads facing the RDL; a second chip disposed between the first chip and the redistribution layer (RDL) wherein a portion of the first chip is disposed outside a lateral extent of the second chip; and a conductive via laterally separated from the second chip, the conductive via extending between the RDL and a first contact pad of the plurality of first contact pads, the first contact pad located in the portion of the first chip disposed outside the lateral extent of the second chip. |