| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_ddbd9538efce6e134d471b912946264e |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L22-34
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-562
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2223-5446
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-561 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-544
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31116
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-78
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-32136
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L22-32
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-3065
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-562
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-585 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-66
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-544
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-3065
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-78
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-311
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-3213
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-00 |
| filingDate |
2019-05-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2020-06-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1c548f4a428160e559366adc22d33b76
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e02a95ee31ca496f6fc5131624cb57c6
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_cc209021c08b0762674e6be1d65242d5
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_370b0a2da77abd6d7eabff5435ee59b4 |
| publicationDate |
2020-06-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-10685883-B1 |
| titleOfInvention |
Method of wafer dicing and die |
| abstract |
A method of wafer dicing and a die are provided. The method includes the following processes. A wafer is provided, the wafer includes a plurality of die regions and a scribe region between the die regions. The scribe region includes a substrate, and a dielectric layer and a test structure on the substrate, the test structure is disposed in the dielectric layer. A first removal process is performed to remove the test structure and the dielectric layer around the test structure, so as to expose the substrate. The first removal process includes performing a plurality of etching cycles, and each etching cycle includes performing a first etching process to remove a portion of the test structure and performing a second etching process to remove a portion of the dielectric layer. A second removal process is performed to remove the substrate in the scribe region, so as to form a plurality of dies separated from each other. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2021375778-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-115831774-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-115831774-B
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-115050645-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11658121-B2 |
| priorityDate |
2019-05-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |