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filingDate 2017-11-16-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2019-06-04-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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publicationDate 2019-06-04-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-10312256-B1
titleOfInvention Method of manufacturing three-dimensional stacked semiconductor structure and structure manufactured by the same
abstract A three-dimensional (3D) stacked semiconductor structure is provided. A substrate having an array area and a peripheral area is provided, and several patterned multi-layered stacks above the substrate are formed in the array area. The patterned multi-layered stacks are spaced apart from each other, and channel holes are formed between the patterned multi-layered stacks disposed adjacently. A charge trapping layer is formed on the patterned multi-layered stacks and deposited in the channel holes as liners. A polysilicon channel layer is deposited along the charge trapping layer, and conductive pads are formed on the polysilicon channel layer and respectively corresponding to the patterned multi-layered stacks. The polysilicon channel layer has a first thickness (t1), one of the conductive pads has a second thickness (t2), wherein the second thickness (t2) is larger than the first thickness (t1).
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