http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10090031-B2
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6b822ee046eb6c45d1e3bd9ce9c1782e |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C5-14 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C8-12 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C8-08 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C5-063 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C5-148 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C5-14 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C8-08 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C8-12 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C5-06 |
| filingDate | 2016-02-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2018-10-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3f2426d6840549cbc9c1ee0af6f8a595 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_27a16e30ed24a5035b606e88955250b2 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_718235ae4820b0c972cebc03af3e925f |
| publicationDate | 2018-10-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | US-10090031-B2 |
| titleOfInvention | Semiconductor device comprising memory circuit and selection circuit |
| abstract | A novel semiconductor device, a semiconductor device with low power consumption, or a semiconductor device capable of retaining data for a long period is provided. The semiconductor device includes a first selection circuit connected to a plurality of first memory circuits, a second selection circuit connected to a plurality of second memory circuits, and a third selection circuit connected to a plurality of third memory circuits, thereby being capable of conducting power gating of each of the first memory circuits, each of the second memory circuits, or each of the third memory circuits separately. Accordingly, the memory circuits to which data is not written or from which data is not read can be kept in a state where power supply thereto is stopped, so that power consumption of the semiconductor device can be reduced. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11366507-B2 |
| priorityDate | 2015-02-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 128.