http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-I677025-B

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filingDate 2014-04-03-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2019-11-11-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b8f12f8e3085bca61142e56986e9bf5d
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publicationDate 2019-11-11-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber TW-I677025-B
titleOfInvention Internal plasma grid for semiconductor manufacturing
abstract The embodiments herein relate to a method and apparatus for etching a semiconductor substrate. A plasma grid assembly is placed in a reaction chamber to separate the reaction chamber into an upper subchamber and a lower subchamber. The plasma grid assembly may include one or more plasma grids. The grid has a slot with a specific aspect ratio to allow certain species to pass from the upper sub-chamber to the lower sub-chamber. When using multiple plasma grids, one or more of the grids are movable to maintain at least the plasma conditions in the lower sub-chamber. In some cases, an electron-ion plasma is generated in the upper sub-chamber. The electrons that reach the lower sub-chamber through the grille are cooled by passing through the grille. In some cases, this can lead to an ion-ion plasma in the lower sub-chamber.
priorityDate 2013-04-05-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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Total number of triples: 32.