http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-I233205-B
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_294881271413951a95f284b588a68e66 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-18 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-1083 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-146 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-146 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-148 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-762 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-10 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-339 |
| filingDate | 2003-08-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2005-05-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_9cd393348be700b936a3beb3db65aa72 |
| publicationDate | 2005-05-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | TW-I233205-B |
| titleOfInvention | Insulated gate field effect transistor and its manufacturing method, solid state imaging apparatus and its manufacturing method |
| abstract | The present invention provides a kind of insulated gate field effect transistor and its manufacturing method, and solid state imaging apparatus and its manufacturing method, which restrict the occurrence of a shutter step or restrict the occurrence of a punch through or injection. In an insulated gate type field effect transistor (30), a gate electrode (32) is formed through a gate insulating film (31) on a semiconductor substrate (11), a source region (33) and a drain region (34) are formed on the semiconductor substrate (11) on both sides of the gate electrode (31). The transistor (30) comprises a p-type first diffusion layer (12), which is formed on the semiconductor substrate (11) at a position deeper than the source region (33) and the drain region (34); and a p-type second diffusion layer (13), which is formed on the semiconductor substrate (11) at a position deeper than the first diffusion layer (12) and having a higher concentration than the first diffusion layer (12). The transistor (30) constitutes an output circuit of the solid state imaging apparatus, which can be used for one part or all of the insulated gate type field effect transistor formed on the semiconductor substrate. |
| priorityDate | 2002-08-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 27.