| abstract |
This invention discloses a chip package structure and its manufacture process, which attaches a chip onto a metal substrate and forms a lamination circuit layer on the chip and the metal substrate. The lamination circuit layer has an outer circuit electrically connected with the metal pads on the chip and part of the outer circuit extends to the area besides the top of the active surface of the chip to fan out the metal pads of the chip. Moreover, there are an inner circuit and a plural number of active devices on the active surface and thus signals can be sent from an active device to the outer circuit through the inner circuit and then from the outer circuit to another active device through the inner circuit. Furthermore, chips with the same function or different functions can be integrated into the same package body and the chips are electrically connected to each other using the outer circuit. |