| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_e757fd4fedc4fe825bb81b1b466a0947 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-0002 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76835
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5222
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5329
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-28
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76811
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76813
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76802
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76829
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76816 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-532
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-522
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-3205
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-316 |
| filingDate |
2001-02-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2002-05-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_17a8889674c91044d451131e1a43c2b2
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b0d699f979a1a83a1b6d72fd92efd206
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_94c13301be976f4fa874d95ceef2113c
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e9838141f279fb1a5f89579c7aab3dff |
| publicationDate |
2002-05-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
TW-488026-B |
| titleOfInvention |
Protective hardmask for producing interconnect structures |
| abstract |
The present invention provides a permanent protective hardmask which protects the dielectric properties of a main dielectric layer having a desirably low dielectric constant in a semiconductor device from undesirable increases in the dielectric constant, undesirable increases in current leakage, and low device yield from surface scratching during subsequent processing steps. The protective hardmask further includes a single layer or dual layer sacrificial hardmask particularly useful when interconnect structures such as via openings and/or lines are formed in the low dielectric material during the course of making the final product. The sacrificial hardmask layers and the permanent hardmask layer may be formed in a single step from a same precursor wherein process conditions are altered to provide films of differing dielectric constants. Most preferably, a dual damascene structure has a tri-layer hardmask comprising silicon carbide BloK™, PECVD silicon nitride, and PECVD silicon dioxide, respectively, formed over a bulk low dielectric constant interlevel dielectric prior to forming the interconnect structures in the interlevel dielectric. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-I505119-B
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8212338-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8288295-B2 |
| priorityDate |
2000-04-17-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |