| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_b2d32a1324eb3a240649ffee8d475d63 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4958
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7811
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7813
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4966 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-401
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823456
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4236
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4238
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42364
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42376
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42372
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0649 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-41
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-40
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28 |
| filingDate |
2020-09-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_25def0b91b712d45d30efca74cfdb52b |
| publicationDate |
2021-09-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
TW-202133441-A |
| titleOfInvention |
Semiconductor device having multiple dimensions of gate structures and method for fabricating the same |
| abstract |
The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate including an array area and a peripheral area adjacent to the array area, a first gate structure positioned in the array area, and a second gate structure positioned in the peripheral area. A width of the first gate structure is less than a width of the second gate structure, and a depth of the first gate structure is less than a depth of the second gate structure. |
| priorityDate |
2020-02-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |