| abstract |
A transistor includes a substrate, a pair of spacers on the substrate, a gate dielectric layer on the substrate between the pair of spacers, on the gate dielectric layer and interposed therebetween a gate electrode layer between the spacers, an insulating cap layer on the gate electrode layer between the pair of spacers, and a pair of diffusion regions adjacent to the pair of spacers. The insulating cap layer forms an etch stop structure that self-aligns with the gate and prevents contact etching from causing contact of the gate electrode, thereby preventing shorting of the gate and the contact. The insulator cap layer enables self-aligned contacts to enable initial patterning of wider joints that are more robust to patterning constraints. |