| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_24aca9ded2638ea793d05360dde7a4a0 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-20
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7371 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66742
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02433
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02463
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78681
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02647
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-8258
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-84
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-8252
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02381
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1203
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02551
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02645
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-737
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02538
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02461
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-18
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-20
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0245 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-04
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-20 |
| filingDate |
2009-10-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_76fb905fe86472478cd786b4a1242a55 |
| publicationDate |
2010-07-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
TW-201025423-A |
| titleOfInvention |
Semiconductor wafer, electronic device, and method for fabricating the semiconductor wafer |
| abstract |
This invention provides a semiconductor wafer having a base wafer, an insulation layer, and a silicon crystalline layer in this order. An inhibiting layer for inhibiting growth of a compound semiconductor is disposed on the silicon crystalline layer and provided with an opening penetrating up to the silicon crystalline layer. Inside the opening is a seed crystal of which the compound semiconductor has lattice-matching or pseudomorphic deformation. This invention further provides an electronic device including: a substrate; an insulation layer disposed on the substrate; a silicon crystalline layer disposed on the insulation layer; an inhibiting layer disposed on the silicon crystalline layer to inhibit growth of a compound semiconductor, and provided with an opening penetrating up to the silicon crystalline layer; a seed crystal disposed inside the opening; a compound semiconductor which has lattice-matching or pseudomorphic deformation; and a semiconductor device formed by using a compound semiconductor. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-I699817-B |
| priorityDate |
2008-10-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |