| Predicate |
Object |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y10S438-926 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-28123
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-32136
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0332
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-18
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76838 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8234
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-335
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-033
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-3213
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8238
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-461
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-302
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768 |
| filingDate |
1994-07-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate |
1995-02-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
KR-950004455-A |
| titleOfInvention |
Semiconductor device and manufacturing method thereof |
| abstract |
A method of manufacturing a semiconductor device having an insulated gate field effect transistor, comprising: connecting a gate electrode layer, an interlayer insulating film, and the gate electrode layer facing the semiconductor substrate via a gate insulating film and a gate insulating film having a predetermined area on a semiconductor substrate. The formed wiring layer is formed, and a conductive material layer and a resist layer are formed on double | sided +%. The resist layer is patterned to form a resist mask that forms a wiring pattern having an antenna ratio of about 10 or more with respect to the area of the gate electrode. At least the conductive material layer is plasma etched using a resist mask as an etching mask, and then the resist mask is removed to plasma etch the wiring layer. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100416410-B1 |
| priorityDate |
1993-07-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |