| abstract |
The transistor comprises a substrate, a pair of spacers on the substrate, a dielectric layer on the substrate and between the pair of spacers, a gate electrode layer on the gate dielectric layer and between the pair of spacers, an insulating cap layer on the gate electrode layer and between the pair of spacers, and adjacent the pair of spacers. It contains a pair of diffusion regions. The insulating cap layer forms an etch stop structure that self-aligns to the gate and prevents the contact etch from exposing the gate electrode, thereby preventing a short circuit between the gate and the contact. The insulating cap layer enables self-aligned contacts to allow initial patterning of wider contacts, which is more robust to patterning constraints. |