http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20200076009-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_a9c8be5926503f1c3cb4dbcce92afd13 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02631 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7869 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78606 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42384 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66742 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-268 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78618 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-41733 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0337 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-786 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-423 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-66 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-268 |
| filingDate | 2018-12-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b4b3a67c236c77af6b26bfe9a859e078 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b394a1c1aba966ec1ec1a7736da78253 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_296bd3c3546b5719be2e5b027a666ccf |
| publicationDate | 2020-06-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | KR-20200076009-A |
| titleOfInvention | Thin film transistor using selective electron beam treatment and method for manufacturing the same |
| abstract | The present invention discloses a method of manufacturing a thin film transistor capable of forming a semiconductor layer, a source electrode, and a drain electrode having excellent interface and contact characteristics and excellent electrical characteristics by using electron beam treatment and shadow mask under various conditions. A method of manufacturing a thin film transistor according to the present invention includes: (a) forming a gate electrode on a substrate, and forming an insulating film on the gate electrode; (b) forming a thin film for forming a semiconductor layer and a source-drain electrode on the insulating film; (c) disposing a first shadow mask including an opening in a region corresponding to a central portion of the semiconductor layer and a thin film for forming a source-drain electrode; (d) irradiating a first electron beam on a semiconductor layer on which the first shadow mask is disposed and a thin film for forming a source-drain electrode, and forming an activated semiconductor layer in a central portion of the thin film for forming a semiconductor layer and a source-drain electrode step; (e) removing the first shadow mask and disposing a second shadow mask having the same shape as the activated semiconductor layer so as to overlap the activated semiconductor layer; (f) irradiating a second electron beam to form a source electrode and a drain electrode on the non-activated semiconductor layer; And (g) removing the second shadow mask; wherein the activated semiconductor layer, the source electrode and the drain electrode are formed on the same plane. |
| priorityDate | 2018-12-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 36.