| abstract |
The transistor comprises a substrate, a pair of spacers on the substrate, a dielectric layer between the pair of spacers on the substrate, a gate electrode layer between the pair of spacers on the gate dielectric layer, an insulating cap layer on the gate electrode layer and a pair of spacers, And a pair of diffusion regions. The insulating cap layer forms an etch stop structure that is self-aligned to the gate and prevents contact etching from exposing the gate electrode, thereby preventing shorting between the gate and the contact. The insulating cap layer enables self-aligned contacts to allow initial patterning of wider contacts, which is more robust to patterning constraints. |