http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20140071234-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6b822ee046eb6c45d1e3bd9ce9c1782e |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-247 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7869 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78696 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42384 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78618 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78636 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78621 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78606 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-41733 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-786 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 |
| filingDate | 2013-11-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_21747acfb77b0d181ab4dff0d66658d4 |
| publicationDate | 2014-06-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | KR-20140071234-A |
| titleOfInvention | Semiconductor device |
| abstract | The present invention provides a semiconductor device capable of miniaturization or high integration. Or, it gives good electrical characteristics to a semiconductor device in which an oxide semiconductor is used. Or a semiconductor device having an oxide semiconductor is suppressed from fluctuating in electrical characteristics, thereby providing a highly reliable semiconductor device. The semiconductor device includes an island-shaped oxide semiconductor layer provided on an insulating surface, an insulating layer surrounding the side surface of the oxide semiconductor layer, a source electrode layer and a drain electrode layer contacting the upper surface of the oxide semiconductor layer and the upper surface of the insulating layer, And a gate insulating layer provided between the oxide semiconductor layer and the gate electrode layer. The source electrode layer and the drain electrode layer are provided above the upper surface of the oxide semiconductor layer, and the upper surface of the insulating layer is planarized. |
| priorityDate | 2012-12-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
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