Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c96a1f7733dd7752c52ee08b34854e90 |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-41766 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42368 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-402 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0619 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-30107 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-456 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-1095 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4175 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66734 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66727 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66659 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H02M7-003 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66681 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823487 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823418 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823456 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7806 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H02M3-155 |
filingDate |
2009-12-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c79699dc922f877ae257c41f28d42580 |
publicationDate |
2010-07-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
KR-20100074043-A |
titleOfInvention |
Single die output power stage using trench-gate low-side and ldmos high-side mosfets, structure and method |
abstract |
PURPOSE: A single die output power stage and a manufacturing method thereof are provided to reduce power loss by integrating a Schottky diode with a lower power MOSFET. CONSTITUTION: An output stage is formed on a single semiconductor die. The output stage comprises an upper transistor, a lower transistor, and a single conductive structure. The upper transistor includes an LDMOS(Lateral Diffused MOS) device. The lower transistor includes a trench-gate VDMOS(Vertical Diffused MOS) device. The single conductive structure forms a gate unit(66A) of the upper transistor and a gate unit(66C) of the lower transistor. |
priorityDate |
2008-12-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |