| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_b7317808024e524eea40a6c5a5ad6a22 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-6656
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-28079
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78621
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66757
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42376
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42384 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-786
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-423
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 |
| filingDate |
2003-10-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_fe431eb37e35f422b4f0a95693bb67d8
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_fb980878f4a844ebf72cf8d32915283f |
| publicationDate |
2005-07-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
KR-20050071643-A |
| titleOfInvention |
Thin film transistors and methods of manufacture thereof |
| abstract |
A polycrystalline silicon GOLDD TFT having a gate 10 overlying the channel 11 is performed using the gate 10 as a mask during the first dopant implantation step. Spacers 13 and 14 are next formed adjacent to the gate 10, which includes portions of the thin film metal layer 19 defined by the fillet 17 in the etching process. Spacers and gates are used as masks for doping the source and drain regions to provide self-aligned fabrication techniques. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20150064874-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20140107451-A |
| priorityDate |
2002-10-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |