| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_994de0e74e58edf232ab67696be5fe90 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02238
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0214
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-6659
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02175
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02142
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02164
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02301
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02271 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-18
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-30604
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31654
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-318
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-3185 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-306
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-318
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-316
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 |
| filingDate |
2003-12-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c57adc9b6d517f8d52e41476b045ca32
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_7d83bfff9d59610632b12b3ea1c25d82
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_dff1a28c6e3330598e6c2de165e087e1
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_70ec069c327fa7233274d65f46b70dc1
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_512c1913f20a9e841ce36fa753dbb1c2 |
| publicationDate |
2004-06-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
KR-20040048361-A |
| titleOfInvention |
Semiconductor device and method of manufacturing the same |
| abstract |
In a semiconductor device formed on a silicon surface having a substantial (110) crystallographic orientation, the silicon surface is flattened so that its surface arithmetic mean deviation is not larger than 0.15 nm, preferably not larger than 0.09 nm, and thus has high mobility. n-MOS transistors can be fabricated. This planarized silicon surface is a method of repeating the deposition process of the self-immolative oxide film and the manufacturing process of the self-immolative oxide film, the method of cleaning the silicon surface in a degassed H 2 O or low OH concentration atmosphere, or the silicon surface of hydrogen or deuterium It is obtained by the method of terminating strongly. The deposition process of the self-sacrificing oxide film can be performed by isotropic oxidation. |
| priorityDate |
2002-12-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |