| Predicate |
Object |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823814
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823821
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0924 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66636
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66545
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-665
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-3065
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0924
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-32136
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823814
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823821
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66795
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823418
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823431
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-785
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0847 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-3065
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8234
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-66 |
| filingDate |
2021-01-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2022-10-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate |
2022-10-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
KR-102459062-B1 |
| titleOfInvention |
Method of manufacturing a semiconductor device and a semiconductor device |
| abstract |
In a method of manufacturing a semiconductor device including a Fin FET, a fin structure extending in a first direction is formed on a substrate. An isolation insulating layer is formed over the substrate such that a lower portion of the fin structure is buried in the isolation insulating layer and an upper portion of the fin structure is exposed from the isolation insulating layer. A gate structure extending in a second direction crossing the first direction is formed on a portion of the fin structure. A fin mask layer is formed on sidewalls of the source/drain regions of the fin structure. The source/drain regions of the fin structure are recessed by a plasma etching process. An epitaxial source/drain structure is formed over the recessed fin structure. When recessing the source/drain regions of the fin structure, the plasma process includes applying a pulse bias voltage and an RF voltage with pulse power. |
| priorityDate |
2020-01-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |