| abstract |
The transistor includes a substrate, a pair of spacers on the substrate, a dielectric layer on the substrate and between a pair of spacers, a gate electrode layer on the gate dielectric layer and between a pair of spacers, an insulating cap layer on the gate electrode layer and between a pair of spacers, and adjacent to the pair of spacers. Includes a pair of diffusion regions. The insulating cap layer forms an etch stop structure, which is self-aligned with respect to the gate and prevents the contact etch from exposing the gate electrode, thereby preventing a short between the gate and the contact. The insulating cap layer makes it possible for self-aligned contacts to allow initial patterning of wider contacts, which are more robust against patterning restrictions. |