| Predicate |
Object |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K3-0035
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K2201-0209
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K3-4644
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K2203-1383
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K1-0373 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K3-4644
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K1-0373
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K3-0032
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K3-0035 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K1-03
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K3-46
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K3-00 |
| filingDate |
2008-11-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2018-03-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate |
2018-03-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
KR-101841523-B1 |
| titleOfInvention |
Process for producing multilayered printed wiring board |
| abstract |
A step of forming a good hole-shaped blind via with a small difference between the bottom diameter and the top diameter of the insulating layer containing 35 mass% or more of the inorganic filler, without causing large irregularities on the surface of the insulating layer around the via, Wherein the multilayered printed circuit board is manufactured by a method comprising the steps of: |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2022114859-A1 |
| priorityDate |
2007-11-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |