| Predicate |
Object |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-525
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-13024
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-13022
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-05548
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-0401
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-02372
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-131 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76816
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-30655
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14683
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-3065
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76877
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14618
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31116
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14636
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76814
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-481
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76898 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-12
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-522
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-3205
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-14
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-3065 |
| filingDate |
2012-12-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2016-06-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate |
2016-06-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
KR-101626693-B1 |
| titleOfInvention |
Semiconductor device and method for manufacturing same |
| abstract |
A semiconductor device includes: a semiconductor substrate having a first surface on which an I / O pad electrically connected to an integrated circuit and an integrated circuit is formed, and a second surface opposite to the first surface; a semiconductor substrate formed on the semiconductor substrate, A first shape portion having a tapered shape in which a diameter of the opening is tapered toward a bottom portion of the hole from a second surface side to a predetermined position in a thickness direction of the semiconductor substrate; And an inorganic insulating film formed on the wall surface of the through hole of the two-step structure and the second surface, and a wall surface of the I / O pad and the through hole of the two- And a wiring pattern formed on the second surface and connected to the penetrating electrode. |
| priorityDate |
2012-01-06-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |