http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-101365800-B1
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_a251ae79dd7a008d95010b238c6aa1f8 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02628 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7869 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-324 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66742 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02565 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-786 |
| filingDate | 2013-03-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2014-02-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c34c22a675bbc509bedcff225cbaeecf http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_9fffec2cc535458646590e38333a3c5c |
| publicationDate | 2014-02-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | KR-101365800-B1 |
| titleOfInvention | Methods of manufacturing indium zinc oxide semiconductor thin film transistor and indium zinc oxide semiconductor thin film transistor manufactured by the methods |
| abstract | Disclosed is a method of manufacturing an indium zinc oxide semiconductor thin film transistor. A gate electrode and a gate insulating layer are formed on a substrate. A semiconductor active layer is formed by spaying a precursor solution including an indium precursor, a first zinc precursor containing no chlorine, and a second zinc precursor containing chlorine to the upper part of the gate insulating layer. A source electrode and a drain electrode are formed in the upper part of the semiconductor active layer. Therefore, the indium zinc oxide semiconductor thin film transistor can be manufactured. [Reference numerals] (AA) Start; (BB) End; (S110) Step of forming a gate electrode on a substrate; (S120) Step of forming a gate insulating layer to cover the gate electrode on the substrate; (S130) Step of forming a semiconductor active layer by spaying a precursor solution including an indium precursor, a first zinc precursor containing no chlorine, and a second zinc precursor containing chlorine to the upper part of the gate insulating layer; (S140) Step of forming a source electrode and a drain electrode in the upper part of the semiconductor active layer |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20190078913-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20150103543-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-102238749-B1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-101563819-B1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-102045027-B1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-101630028-B1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-101556644-B1 |
| priorityDate | 2013-03-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 70.