http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-101133518-B1
Outgoing Links
Predicate | Object |
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classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823814 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8238 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 |
filingDate | 2005-06-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate | 2012-04-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationDate | 2012-04-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | KR-101133518-B1 |
titleOfInvention | Semiconductor device and manufacturing method |
abstract | The present invention provides a method of manufacturing a semiconductor device capable of improving the hot carrier characteristics by preventing the metal silicide layer formed to reduce contact resistance from being diffused toward the channel region and suppressing defects of the silicon nitride film deposited through a subsequent process. According to the present invention, there is provided a substrate in which a well is formed, forming a gate electrode on the substrate, and forming an oxide-based first insulating layer along a step of an upper portion of the entire structure in which the gate electrode is formed. And a thermal process using a mixed gas containing nitrogen to prevent the metal silicide layer to be formed in the source / drain region from being diffused in the channel direction formed on the substrate under the gate electrode through a subsequent process. Performing nitriding the first insulating film, and nitriding the first nitrided film. Depositing a second insulating film on the flexible film, etching the first insulating film and the second insulating film to form spacers on both sidewalls of the gate electrode, and source / excess in the wells exposed to both sides of the spacer. Forming a drain region, and forming a metal silicide layer on the gate electrode and on the source / drain regions.n n n n Oxide film, nitride, LDD, CMOSFET, hot carrier, metal silicide layer. |
priorityDate | 2005-06-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 22.