http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-101131135-B1
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78621 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66757 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-786 |
| filingDate | 2005-11-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2012-04-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2012-04-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | KR-101131135-B1 |
| titleOfInvention | Thin Film Transistor and Manufacturing Method Thereof |
| abstract | A thin film transistor having an offset or LDD structure by self alignment is described. The disclosed thin film transistor includes a substrate; A silicon layer provided on the substrate and having a channel region, source and drain regions on both sides of the channel region, and offset regions respectively positioned between the source and drain regions on both sides of the channel region and the channel region; A gate insulating layer covering the channel region and the offset region provided at both sides of the channel region except for the source and drain regions; And a gate layer formed on the channel region except for the both offset regions. Such a thin film transistor has a structure in which an offset or LDD region is obtained without an additional mask process.n n n n Thin Film Transistor, Self Alignment, LDD, Offset, Current Leakage |
| priorityDate | 2005-11-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 17.