http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100649292-B1
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-06 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-8249 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823493 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0623 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-73 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-266 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-74 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823412 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-22 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-18 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-06 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-266 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-74 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-73 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8234 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-22 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8249 |
| filingDate | 2003-01-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2006-11-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2006-11-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | KR-100649292-B1 |
| titleOfInvention | Manufacturing Method of Semiconductor Device |
| abstract | The present invention discloses a method of forming a plurality of semiconductor devices having different characteristics in the same semiconductor substrate. In order to obtain the first and second FET buried layers 8 and 9, first and second antimony introduction regions 24a and 27a are formed in the P-type semiconductor region 6 of the semiconductor substrate 41. Masks 46 having openings 47 and 48 which are first and second patterns having different patterns are formed on the semiconductor substrate 41. Phosphorus is introduced into the semiconductor substrate 41 through the openings 47 and 48 of the mask 46, and the first and second phosphorus introducing regions 24 are overlapped with the first and second antimony introduction regions 24a and 27a. 51, 52) are formed. The average impurity concentration of phosphorus in the first selection portion 49 for the first buried layer is higher than the average impurity concentration of phosphorus in the second selection portion 50 for the second buried layer. An N-type epitaxial layer is formed on the P-type semiconductor region 6 including the antimony introduction regions 24a and 27a and the phosphorus introduction regions 51 and 52, thereby obtaining first and second buried layers. |
| priorityDate | 2002-01-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 32.