http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100316707-B1
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823842 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-28035 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-18 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4925 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8238 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-49 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28 |
| filingDate | 1999-02-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2001-12-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2001-12-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | KR-100316707-B1 |
| titleOfInvention | MOS transistor and manufacturing method thereof |
| abstract | In the MOS transistor of the present invention, a gate insulating film is formed on a semiconductor substrate, and a gate electrode pattern is formed of a polysilicon layer on the gate insulating film. In addition, an impurity layer is formed in an intermediate or arbitrary region inside the gate electrode pattern. The impurity layer may be made of an inert element such as argon (Ar), xenon (Xe), helium (He), or krypton (Kr). In addition, the impurities may be made of silicon, germanium, indium, arsenic or antimony. In particular, in the MOS transistor of the present invention, since the polysilicon layer and the impurity layer are sequentially formed on the gate insulating film to form an amorphous silicon layer, the amorphous silicon layer can be well formed. Accordingly, the gate electrode pattern may be reliably formed during patterning due to the amorphous silicon layer. The polysilicon layer, the impurity layer, and the amorphous silicon layer are crystallized in a subsequent process to become a gate electrode pattern of the polysilicon layer as a whole. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-101354660-B1 |
| priorityDate | 1999-02-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 37.