Predicate |
Object |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y10S438-906 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31051 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31629 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02271 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31633 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31612 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02274 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31625 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-3205 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02164 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02131 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-022 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02071 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76819 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02126 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02129 |
classificationIPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-3105 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-3213 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-316 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-02 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-302 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-3065 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-522 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28 |
filingDate |
1997-10-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate |
2001-01-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationDate |
2001-01-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
KR-100273653-B1 |
titleOfInvention |
Manufacturing Method of Semiconductor Device |
abstract |
BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a method for manufacturing a semiconductor device suitable for a semiconductor device having a multi-layered wiring. It is a problem to provide a manufacturing method.n n n Forming a wiring layer on a semiconductor substrate; dry etching the wiring layer as a resist pattern mask to form only patterning wiring; and depositing the wiring only by patterning the wiring in an amine-containing liquid and depositing residue during dry etching. A step of removing the amine, a step of treating the wiring immersed in the liquid containing the amine in a fluid capable of removing the deposited residue without containing the amine again, and an insulating layer conformal on the processed wiring. And a step of forming an insulating layer having a planarization function by CVD on the conformal insulating layer. |
priorityDate |
1996-11-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |