http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-WO2009028596-A1

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filingDate 2008-08-28-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationDate 2010-12-02-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-WO2009028596-A1
titleOfInvention Passive element embedded substrate, manufacturing method, and semiconductor device
abstract Provided are a passive element-embedded substrate that is unlikely to break down and can be easily manufactured at low cost, and a method for manufacturing the same. The thin film passive element 4 is formed on the mounting substrate 1 on which the connection pad 2 is formed, and the substrate 7, and the terminal electrode 3 corresponding to the connection pad 2 is formed on the surface on the thin film passive element 4 side facing the connection pad 2. In addition, the terminal electrode 3 is bonded to the connection pad 2 and the substrate 7 is filled between the passive element chip having a thickness of 15 μm or less and the passive element chip and the mounting substrate 1, and the outer periphery of the passive element chip A resin 6 formed so that the upper surface of the portion arranged in the portion coincides with the upper surface of the substrate 7, an LSI connection pad 9 formed on the upper surface of the substrate 7 corresponding to the terminals of the semiconductor element or the semiconductor package, A through via 8 formed so as to electrically connect the corresponding LSI connection pad 9 and the terminal electrode 3 in the passive element chip is provided.
priorityDate 2007-08-30-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 30.