http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-S6355958-A

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classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-3065
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filingDate 1986-08-27-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_65108d009bd898493fb3de9af8ca85ca
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publicationDate 1988-03-10-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-S6355958-A
titleOfInvention Method and apparatus for cutting ic wiring
abstract PURPOSE: To prevent short circuits between interconnections by projecting a converged charged particle beam on a semiconductor substrate, in which a plurality of the interconnection layers are formed through the upper part of the interconnection layers, forming a hole in the semiconductor substrate and performing etching, thereby removing the interconnection material which is attached to the side wall of the hole. n CONSTITUTION: The aluminum interconnections of a sample 14 comprise an upper interconnection layer 22 and a lower interconnection layer 23. An insulating film 21 is provided between the layers. The sample 14 is introduced in an ion beam machining chamber 2 through a valve 15. The interconnections are cut with an ion beam 18. Then, the sample 14 is moved to a plasma treating chamber 1 through a gate valve 13. For example, etching is performed in a mixed gas plasma atmosphere of CCl 4 and Cl 2 . A sample stage 6 is made to be a grounding electrode. Isotropic etching is performed. Thus, aluminum 24, which is attached on the side wall, is removed without deforming the shape of the machined hole. In this way, short circuits can be prevented. n COPYRIGHT: (C)1988,JPO&Japio
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priorityDate 1986-08-27-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 27.