http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-H1174643-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_03d0f52bb4069f8a19d70dcfb697c67a |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/C23C22-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K3-38 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K3-46 |
| filingDate | 1997-08-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_bbb915d8729c2ce674b756c1bfe8679f http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0a187aa555fb12707f603e1fa9d5ce8a |
| publicationDate | 1999-03-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-H1174643-A |
| titleOfInvention | Method for producing multilayer wiring board, image forming method, and transfer sheet used in these methods |
| abstract | (57) [Problem] To provide a method for manufacturing a multilayer wiring board in which the adhesion between an image layer of a photosensitive insulating resin layer and a metal plating film is improved by a safe operation without causing environmental pollution. . SOLUTION: A step of providing a photosensitive insulating resin layer on the first wiring pattern on the insulating substrate having the first wiring pattern formed thereon, the method including fine particles having an average particle diameter of 1 to 10 μm, A sheet in which a water-soluble or alkali-soluble resin layer having fine irregularities formed on the surface is provided on a support, on the insulating substrate, a water-soluble or alkali-soluble resin layer and a photosensitive insulating resin layer are formed. Superimposing so as to be in contact with each other, applying pressure by heating and pressing, exposing imagewise and developing to form an insulating resin layer having holes and having fine irregularities on the surface; A step of forming a plating layer on the surface of the resin layer and the holes, and a step of forming a second wiring pattern by removing by etching. A method for manufacturing a multilayer wiring board comprising: |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-WO2005104638-A1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10893613-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2005104638-A1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8584352-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-5263285-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2009107760-A1 |
| priorityDate | 1997-08-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 38.