| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_2175de8bcadd3c1447a15ba8b57051c6 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y10S438-964 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L28-84 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-822
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-02
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-92
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-04 |
| filingDate |
1998-04-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2f198c2dc5b2fcbcb39ff1b0ffef3901
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_727a5a87c2eabbac782a11afcb791633
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8f9255547f533190fea86c736f26a67e
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_79dafa2ba8c8c3906f694f3a3f6d1f63
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_88cf9e2b6f9f0bf44324a4b0077eb0c3
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_7a317af88c56139b3e1189c5382d1650
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f315c4a557e9a8f0e7b6541f4f634a90
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ac96bdec5d8c7253f0ab8e9bb711eb76
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_dc9de20e477847a95791feb5f3684fd0
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_77211ccbf098cef5d3b71aa948a3cb72
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_492306a57c38c4fbfb800353c5daaa70
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ebc0565e63bc1958457b49240a14c657
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_850aad8bc0fc2e4085480fb2577d5c25 |
| publicationDate |
1998-11-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
JP-H10303368-A |
| titleOfInvention |
Method of manufacturing integrated circuit capacitor having improved characteristics of electrode and dielectric layer and capacitor manufactured by the method |
| abstract |
(57) Abstract: Provided are a method of manufacturing an integrated circuit capacitor having improved electrode and dielectric layer characteristics, and a capacitor manufactured by the method. A method for manufacturing an integrated circuit capacitor includes forming a conductive layer pattern on a semiconductor substrate; Forming a hemispherical grain (HSG) silicon surface layer containing a dopant of a first conductivity type on the conductive layer pattern, forming a dielectric layer on the HSG silicon surface layer; Forming an electrode on the dielectric layer on the side opposite to the above. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6376328-B1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2001200363-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100867046-B1 |
| priorityDate |
1997-04-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |